WSiP, Warszawa 3. Białasiewicz J. T.: Falki i Frąckowiak L.: Energoelektronika. Część 2: Tunia H., Winiarski B.: Energoelektronika. WNT. Warszawa. [2] Rusek A. Podstawy elektroniki WSiP W-wa [3] Barlik R., Nowak M. [4] Nowak M., Barlik R. Poradnik inżyniera energoelektronika WNT W-wa WSiP. Warszawa [4] Teixeira S., Pacheco X.: Delphi 4 Vademecum [3] ?id=&spis_artykulow.

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Transition between adjacent sub-cubes using space division SD1. The harmonic spectra of the converter’s output voltages have been analyzed.

Choosing one of this states, depending on output current direction, makes possible charging and discharging the flying capacitor in each phase.

Plane division into six sectors by external vectors. Therefore, the maximal reduction can be obtained, when peak of the phase current is located in the centre of clamped non modulated regions. Determination of k0 factor from waveform of currents. U ref Energoeoektronika Carrier t U t Fig. Its dsip is subtracted from commanded speed defined by user.

After the windings and cores assembly, the chokes undergo the process of vacuous impregnation, which ensures the reliability of the smoothing chokes produced in hard environmental conditions and also results in lowering the power enerhoelektronika. Summary Experimental results presented in this chapter confirm proper operation of proposed Modified SVM.

Higher number of levels requires higher number of flying capacitors in each phase. Proper use of those quantities also helps to improve the performance of modulator.


Smoothing chokes – ELHAND Transformatory

Starting from the initial values e. Illustration of virtual vector UV used for capacitor voltages balancing. In spite of its advantages the 3D-SVM is not commonly used method of modulation. The selected models are based on synthesis of the step waveforms which comply to the best approximation criterion.

Aparaty i urzadzenia elektryczne Podrecznik : Witold Kotlarski :

Multilevel converters synthesize output voltage from more than two voltage levels. After review of the basic three-level inverter topologies Chapter 2 further considerations have been concentrated on Neutral Point Clamped NPC converter. I have modified the syllabus as follows: Additionally, the developed algorithm energoelektfonika following features: One of the methods to solve this problem, presented in [P1, P2], introduces ejergoelektronika the modulation additional virtual vector, parallel to the medium vector, which utilizes both capacitors equal and does not affect voltage balance in DC circuit.

For understanding SVM space vector definition and explanation is presented. According to assigned power proper short vector can be used. As consequence also the output current is strongly distorted. Average voltage in sampling time should be equal to commanded voltage. Among them, most important are: Steady state operation of IM in regions 1st2nd3rd a classical modulation b modified modulation From the top: As a result of this analysis the proposal of a new THD factor has been presented.

In the same way that using previous 3D space divisions, other flow diagram can be defined to find out the tetrahedron where the reference vector is pointing to. The contribution of this state vector to the output currents is completely different and therefore, undesired ripples appear Fig.


FLC topology is suitable for Adjustable Speed Drives ASDbut their drawbacks, high number of voltage measurements and capacitors make these converters expensive.

Adjacent tetrahedrons from both sub-cubes have only two common state vectors. A closed set of orthonormal functions. In the experimental investigations 3kW squirrel cage IM has been used.

Transformatory, autotransformatory, dławiki, filtry, zasilacze w ofercie firmy Elhand

During speed reversal the Modified SVM introduces small error between capacitor voltages, brought down to zero after the speed sign change. Table 11 presents IM parameters. A merit figure can be defined in order to show what are the distances di in each case and what is the better solution depending on the reference vector coordinates.

This solution can be easily adopted to buck-to-buck converter by adding second FPGA device for front-end converter modulation. Efficiency characteristics for classical and modified modulation in the 4th region. Because of that very simple model is obtained and for this model any criterion cannot be applied.

Be the first to review this item Would you like to tell us about a lower price? In such cases generated voltage is different than reference. Amazon Restaurants Food delivery from local restaurants. Block diagram snergoelektronika PI controller.